xen/arm: vgic-v2: Implement correctly ITARGETSR0 - ITARGETSR7 read-only
authorJulien Grall <julien.grall@citrix.com>
Wed, 18 Nov 2015 16:42:38 +0000 (16:42 +0000)
committerIan Campbell <ian.campbell@citrix.com>
Wed, 25 Nov 2015 11:56:35 +0000 (11:56 +0000)
commitbc50de883847c1ebc7c8b4d73283d9be6c4df38e
tree2b8e7f58ba75d642424cf7dc5c793a408c23575c
parentca550063e38da59a3b529f31a64f0d8787b61876
xen/arm: vgic-v2: Implement correctly ITARGETSR0 - ITARGETSR7 read-only

Each ITARGETSR register are 4-byte wide and the offset is in byte.

The current implementation is computing the end of the range wrongly
resulting to emulate only ITARGETSR{0,1} read-only. The rest will be
treated as read-write.

As 8 registers should be read-only, the end of the range should be
ITARGETSR + (4 * 8) - 1.

For convenience introduce ITARGETSR7 and ITARGETSR8.

Signed-off-by: Julien Grall <julien.grall@citrix.com>
Reviewed-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
xen/arch/arm/vgic-v2.c
xen/include/asm-arm/gic.h